As the dimensions of transistors decrease, the thickness of the gate oxide must be reduced to maintain performance with the decreased gate length. However, in order to reduce gate leakage, high dielectric constant (high-k) gate dielectric layers are used which allow greater physical thicknesses while maintaining the same effective thickness as would be provided by a typical gate oxide used in larger technology nodes.
Additionally, as technology nodes shrink, in some integrated circuit (IC) designs, there has been a desire to replace the typically poly-silicon gate electrode with a metal gate electrode to improve device performance with the decreased feature sizes. One process of forming the metal gate electrode is termed “gate last” process in which the final metal gate electrode is fabricated “last” which allows gate electrode to bypass some high-temperature processes, such as S/D anneal.
FIG. 1 shows a cross-sectional view of a conventional gate structure 120 for a Field Effect Transistor (FET) 100 fabricated by a “gate last” process. The FET 100 can be formed over an active region 103 of the substrate 102 adjacent to isolation regions 104. The FET 100 includes source/drain regions 106 and lightly doped regions 108 formed in the active region 103 of the substrate 102, a gate structure 120 comprising an interfacial layer 122, a gate dielectric layer 124 and a multilayered metal gate electrode 120a sequentially formed over the substrate 102 and gate spacers 110 respectively formed on both sidewalls of the gate structure 120. Additionally, a contact etch stop layer (CESL) 112 and an interlayer dielectric (ILD) layer 114 may also be formed over the substrate 102.
The multilayered metal gate electrode 120a comprises a lower portion 126 and an upper portion 128 sequentially formed over the gate dielectric layer 124. The lower portion 126 is formed of a first metal material acting as a work-function metal layer and having a first resistance. The upper portion 128 is formed of a second metal material acting as an interconnection metal layer and having a second resistance lower than the first resistance. Since the upper portion 128 with lower resistance occupies a small ratio of the multilayered metal gate electrode 120a by area, it has been observed that the multilayered metal gate electrode 120a exhibit high gate resistance, which can increase RC delay of the circuit and degrade device performance.
Accordingly, what is needed is a metal gate electrode of a gate structure having lower gate resistance.